Project Memory³: Division EAS

Ultra-HD cameras capture image signals with four times as many pixels as full-HD resolution. In the case of video recording, the data volume that has to be processed in the same time frame also increases considerably. This can be achieved only with very powerful and efficient data processing. A 3D microchip design is particularly well suited to meeting these especially high requirements for the electronics in special cameras. The main reason is that the classic design reaches its limits when it comes to improving essential performance characteristics still further and meeting the demands of increasingly smaller and more energy efficient systems. The Design Automation Division EAS of Fraunhofer IIS has therefore developed a 3D-integrated chip design that enables exceptionally high system performance with a compact component layout.

Solution approach

A processor and wide I/O memory are placed on a single interposer within the same housing in order to achieve very high bandwidth for data exchange between the two components. Based on this design, the researchers at the institute are working together with Dream Chip Technologies on the realization of a special memory bus for video cameras. This will enable fast and energy-saving communication between the processor and the memory chip for high-performance pre-processing of data in the devices.

The three-dimensional integration technology means that the entire electronic system is substantially smaller than classic designs with standardized component sizes. This in turn requires shorter connections between the various components. Data is transmitted between the components much more quickly, enabling a significant rise in frame rate and data rate. The goal is to achieve data rates between the memory and the processor of up to 400 Gbit/s for the greater requirements in the future. Shorter conductor paths also consume significantly less energy, which positively impacts the energy profile and device lifespan.

Project status: completed