Newsletter 01/2017

The knowledge about aging processes in electronic components is crucial for many applications of integrated circuits (ICs). However, with the increasing miniaturization of microchips and new manufacturing technologies, this task is becoming particularly challenging. Fraunhofer IIS/EAS researchers therefore developed efficient mathematical models for the prediction of the degradation of transistors, specifically for the new technological developments. For the first time, this gives electronic designers worldwide the opportunity to carry out realistic simulations and thus accurately predict the behavior of circuits for years in advance. They cannot just use standard models for the most important effects that influence the lifetime of the components. In order to develop very long-lasting microchips, more complex dependencies are also considered.

Reliability and robustness of ICs
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Reliability and robustness of ICs

Particularly in safety-critical areas, such as in automobiles or in medical technology, electronics must be extremely reliable, powerful, and energy-efficient. Especially for such applications, developers are faced with the urgent task of designing components that are particularly robust and reliable. Aging simulations for the wear of semiconductors should help them with that task. But for novel manufacturing technologies, which are increasingly used, the currently available standard simulations simply do not provide the desired meaningful results. That’s why Fraunhofer IIS/EAS offers modeling solutions for these cases, which ensure a realistic depiction of electronic aging over the service life and thus the development of reliable ICs.

In standard electronics, designers usually minimize the risk of failure by incorporating safety reserves into their designs. However, this so-called "overdesign" is expensive, time-consuming, and cannot be implemented with ever-smaller technologies. The integration of reliable aging simulations into the IC development process makes this procedure superfluous. Naturally, this requires highly accurate aging models, as are being offered by Fraunhofer IIS/EAS now. They are precisely matched to the particular technology being used and replace the highly simplified and inconsistent models that are currently available in the work environments of designers. "Our services provide a unique, comprehensive and significantly more reliable prediction for the life span of digital and analog circuits than any other approach used so far," emphasizes Roland Jancke, who heads the Design Methodologies department at Fraunhofer IIS/EAS. "For the first time ever, we offer our customers the opportunity to verify and validate the function of complete electronic systems under various conditions of use. This allows them to be certain that a circuit will operate reliably, even under difficult ambient and operating conditions. And all that without costly "overdesign" or the risk of unexpected failures during the operation."

The aging models include the typical effects of Hot Carrier Injection (HCI) and Bias Temperature Instability (BTI). If necessary, they can be supplemented by additional effects, such as electromigration (EM). The Fraunhofer IIS/EAS product range expands the common state of technology by also covering more complex dependencies, such as the saturation over time or voltage-dependent time exponents, which were not yet available in the various design software applications. The researchers have even developed a fast but accurate modeling solution for recovery effects that occur in BTI degradation. All models are provided by Fraunhofer IIS/EAS consistently for all world-wide standard design environments. In order to be able to also offer its solutions to American customers, the researchers are working together with a distributor in the USA specializing in design automation.