Newsletter 02/2020

Our advanced packaging expert Andy Heinig about package design for AI at the edge and why system architects need to be able to compare different design variants at an early stage with a high level of abstraction.

In the future, data capture is taking place even more often directly at machines and data fusion at the so-called "edge"
© zapp2photo / Fotolia.com
In the future, data capture is taking place even more often directly at machines and data fusion at the so-called "edge"

Industrial applications will acquire significantly more data directly from machines in coming years. To properly handle this increase in data, it must already be prepared at the machine. The data of the individual sensors can be processed, or an initial data merger can take place here at the so-called “edge.” Algorithms and methods from the field of artificial intelligence increasingly are being employed for this. These require powerful and flexible hardware, and the development of this hardware requires both new packaging concepts and corresponding design tools.

The use of AI algorithms requires the integration of very high-performance processors and memory. A complete system also requires the integration of a power supply and the required interfaces to the sensor, as well as to the outside world. To make this work, an increasing number of packaging types from the field of advanced packaging are available for such designs. This allows, for example, memory to be connected to the processor using various direct bonding methods. For the power supply, passive structures such as inductors and transformers are available that can be integrated into the packaging. Various types of multi-chip packaging can be used to implement communication interfaces.

Due to the rising number of possible design variants, it is important for system architects to be able to compare different variants at an early stage. This requires the availability of various models at a high level of abstraction. For example, this could be preliminary characterizations of typical high-frequency structures for various packaging types in order to estimate at an early stage the loss from the output of the active circuit to the antenna. An early estimation of the performance is then possible by combining the individual models of the various packaging components and simulating them.

System models written in high-level languages, such as SystemC, also can be partitioned among the various available components. This enables an initial estimation of the required connection resources between the components, whether that includes copper pillars, balls, or other options. Since these are frequently highly limited, any bottleneck can be discovered early. Using this high-level approach also makes it possible to compare different interface types between the components. This often yields an optimization between performance and the required connection resources.

When the decision for one or more potential design variants has been made, similar procedures can be used for further refinement of the systems. Models can be used here again — this time at a more refined level — to evaluate the performance. When the entire packaging is developed with tools that support the complete assembly design flow, all components of the system can be optimized together, which is absolutely essential for such complex package designs.

The consistent use of such design methods then also allows further adaptation of the processor architectures to the additional possibilities of the new packaging types. Only when these adaptations are implemented consistently can the full potential of the future packaging types be exhausted.