Newsletter 04/2024

The pilot line for “Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems” (APECS) has officially commenced operations. It marks a major leap forward in strengthening Europe’s semiconductor manufacturing capabilities and chiplet innovation as part of the EU Chips Act. The Engineering of Adaptive Systems division of Fraunhofer IIS is also contributing its research to the new pilot line.

© loewn | Bernhard Wolf
Within the framework of the APECS pilot line will be possible to further expand the R&D infrastructure for semiconductor technologies and applications in the coming years.
Post-CMOS Drucksensor-Chiplets mit Wafer-level Gehäusen
© Fraunhofer ISIT
Post-CMOS pressure sensor chiplets with wafer level packaging before dicing.

The APECS pilot line focuses on bridging application-oriented research with innovative developments in heterogeneous integration, in particular emerging chiplet technologies. By pushing beyond conventional system-in-package (SiP) methods, APECS will deliver robust and trusted heterogeneous systems, significantly boosting the innovation capacity of the European semicon-ductor industry.

By providing large industry players, SMEs, and start-ups with a facilitated access to cutting-edge technology, the APECS pilot line will establish a strong foundation for resilient and robust European semiconductor supply chains. 

Within APECS, the institutes collaborating in the Research Fab Microelectronics Germany (FMD) will work closely with European partners, to make a significant contribution to the European Union´s goals of increasing technological resilience, strengthening cross-border collaboration and enhancing its global competitiveness in semiconductor technologies. 

Together with the Fraunhofer IIS division »Smart Sensing and Electronics«, we lead the design work package that addresses system technology co-optimisation (STCO) for heterogeneous integrated systems. We will research and enable new design and testing methodologies in order to improve cost-effectiveness, energy efficiency, reduce ecological footprint, and achieve high reliability.

APECS is co-funded by the Chips Joint Undertaking and national funding authorities of Austria, Belgium, Finland, France, Germany, Greece, Portugal, Spain, through the “Chips for Europe” initiative. The overall funding for APECS amounts to € 730 million over 4.5 years.